This invention relates to MOS circuits and more particularly to a source follower circuit which exhibits low input capacitance and low voltage drop from input to output.
In MOS integrated circuits there are many situations where a circuit node should be isolated from output loading. That is, a capacitive load would be detrimental to the circuit operation at this node. Likewise a load which conducts current, or which would feed back a voltage would be undesirable. A so-called "source follower" circuit has long been used in these applications, but still exhibits some capacitive loading.
It is the principal object of this invention to provide an MOS circuit which exhibits essentially zero voltage change from input to output and which exhibits substantially lower capacitive loading on the input. Another object is to provide an improved source follower circuit using MOS transistors.